ARSC HPC Users' Newsletter 221, June 6, 2001
Brown Bag Lunch with Don Morton
Marking the return of Arctic summer, Don Morton arrives next week from the University of Montana for his annual visit. Like the geese, sandhill cranes, trumpeter swans, and various ducks (who proceeded him by 6 weeks), he's flying in, apparently too busy to drive anymore.
It's just not like the old days...
Please join us for a Brown Bag lunch with Don. If it's sunny and over 50 degrees F, we'll eat outside.
Wednesday, June 6 12:00-1:00 Butrovich Building
Topics to discuss with Don:
- ARSC summer internship program
- AGN (Access Grid Node) activity and teaching
- EPSCoR (Experimental Program to Stimulate Competitive Research)
- Collaboration between ARSC/UAF and UM
ERDC Technical Reports
If you feel like browsing a nice collection of HPC related papers, you might visit the ERDC DSRC's web site:
The site uses HTML frames, so I can't give you the actual bookmark. To navigate to the technical reports, click on "Publications" / "Technical Reports". Here's a very short sample of the available titles:
01-05 Performance Comparison of SGI Origin 2800 and SGI Origin 3800 on Application Codes Jeff Hensley, Daniel Duffy, Mark Fahey, Tom Oppe, William Ward, Robert Alter
01-04 FORTRAN 77 to FORTRAN 90 Source Code Conversion and Maintenance Tools Richard Weed
01-01 Emulating Co-Array Fortran with Pthreads Richard J. Hanson, Stephen F. Wornom
00-38 The Effect of Wave Propagation Scheme on SWAN Nearshore Wave Predictions Stephen F. Wornom, David J. S. Welsh, Keith W. Bedford
00-35 Using OpenMP and Threaded Libraries to Parallelize Scientific Applications Daniel Duffy
00-34 Tools for Understanding Program Performance John Mellor-Crummey
There's a second section of reports under "User Guides, FAQs, and Documentation" / "Technical Publications".
The Cray User Group's annual SUMMIT conference was held May 21 - May 25 at a resort hotel in Indian Wells, CA. Here are brief excerpts from Liam Forbes' and Tom Baring's CUG reports, starting with Liam's.Monday 5/21/2001 AM
General Session Corporate Direction - Jim Rottsolk, CEO, Cray Inc. 2 current products - T3E, SV1 3 new products - SuperCluster, MTA-2, SV2 most research resources going into SV2 development Focus & Resources - catch up for T90P, T3F cancellations - support multi-architecture customer base - participate in market mainstream - resume innovation Leading Innovations deliver real-world sustained performance customize for greater performance & usability, but leverage 3rd party technology New Products SuperCluster - T3E via COTS follow on SV1ex SX - classic high-end high-bandwidth vector system (NEC) SV2 MTA-2 NEC Agreement 10 year distribute & support vector products exclusive North America, non-exclusive rest of world Cray absorbs HNSX operations $25M non-voting investment in Cray (received) lift anti-dumping (5/3) no IP transfer reinvigorate vector market, especially in US add revenue growth opportunity leverage Cray sales/service apply cash investment to Cray R&D and operationsThursday 5/24/2001 AM
Corporate Direction - Bob Bishop, CEO, SGI "Visualization will always be the key to enlightenment." Focus on "big data" Over 450 Reality Centers installed worldwide - the "spearhead" of SGI products MIPS/IRIX platform is "critical to the future of SGI. It's at the core of SGI's visualization capabilities." Now shipping over 10K processors for O3K & Onyx3 systems "We will be the first company that puts to the market a TeraFLOP single system image machine." Itanium & Linux are complementary to MIPS/IRIX. May 29 - announcements about Itanium products; 7,400 employees including temps and contractors, intend to bring it down to 6,000 expect to break even and be cash neutral within the next 90 days Jan Silverman, Senior VP Sales & Marketing, SGI Committed to deliver products and solutions to Technical & Creative Customers Increase the rate of performance & price/performance of MIPS/IRIX Limited release of Itanium 1 systems due to close follow-on of McKinley Decrease our investment in non-differentiated commodity type products ex: no Pentium 4s to follow Pentium 3 products, focus on Itanium New marketing strategy Technology Direction - Eng Lim Goh, VP & CTO, SGI Focus on low latency - high bandwidth systems Design goal is to reduce the "latency profile" of large systems SN-2 MIPS R18K 48bit physical address space 256TB max memory addressable for entire SSI system Build and sell high performance clusters comprising the largest nodes in the industry (512P, 1TB) while sustaining a lead of 4x the competition in order to provide the ease of shared memory programming if required and run the fastest MPI programs if not required. "The fastest computer needs to be the smallest." Build and sell high performance graphics systems which address the performance graphics and the feature graphics segments separately, but competitively differentiated by their high degree of integration. This fellow should have had the majority of speaking time in this session. Hardware Update - Dave Parry, Sr VP High Performance Systems, SGI & Jan Silverman, Sr VP Marketing Shipping O3K 128P -> 256P -> 512P Onyx3000 500MHz (R14K) processor GSN for Origin & Onyx TP9100 & TP9400 storage solutions Octane2 V6/V8 -> V10/V12 dual channel display option Processor Roadmap 2001 - R14K 500MHz, 1 GFlop 2002 - R14KA 600MHz 2002/3 - R16K 700MHz, 1.4 GFlop 2003/4 - R18K(N1) on cache secondary cache (1MB cache on chip), fused multiply add unit (4 flop/cycle), 800MHz, 3.2 GFlop long term commitment to MIPS/IRIX no recompiling IRIX binaries upgrade at own place new processor every 9 - 12 months two processor frequency options always available HPC Platform Roadmap Origin200 - R12KS "Speedo2" - R14K -> R16K -> R18K O3K/O3K - R12K -> R14K -> R14KA -> R16K -> R18K Nextgen Node - ?? - follow on to O3K SN-IPF - Itanium -> McKinley -> Madison NUMAflex I/O - XIO/PCI -> PCI-X -> Peer IO -> IFB 12x? NUMAflex Fabric - NUMALink3 -> NUMALink4 -> NUMALink5[ From Tom Baring's report] Monday am
David Kiefer: Cray Inc.: Hardware Roadmap/Update T3E Limitations are due to technology and agreement with sgi Did upgrade proc to ev5.6... clk 675mhz... pk perf: 1350 mflops SV1 SV1 300mhz/ 22 gb/s mem bandwidth SV1e processor 500mhz / improved cache SV1ex 48 gb/s sust. Mem bw, 32 or 96 gb internal ssd SV1e Processor processor and cache on same chip. 500mhz. Still 256 kb cache "X" memory: 1.5 - 2x sus mem bandwidth 1.25-1.6x single cpu bw improvement SSD: 30 gb/s bw: highest ever offered SV1e delivered and in operation (at ARSC) SV1ex mem in validation... deliver in q3 Supercluster SC's need t3e like features SMP nodes w/ 2 x 833 mhz alphas MTA-2 highly-scalable 256 procs max each proc 128 instr. streams / different hardware stream activated each clk shared mem model: each proc can access arbitrary locations 25 active streams per proc / Overlaps mem latency up ot 1tb mem 25.6 gb/s sys io bandwidth friendly to programmers. SV2 Big departure in vect arch... t3e-like scalability 64 and 32 ieee arith 128 v regs, 512 scalar/address regs per cpu status initial node module powered up and in test OS/PrgEnv running well in simulators challenges Differentiation : Bandwidth, sustained performance Improve devel cycles Lower devel cost Product classes Distributed shared memory SV2 Distributed memory T3e SC Uniform shared SV1 MTA Roadmap SV1ex relies on locality (cache) for perf... SX5 is more traditional, (no cache) vector system. SV1ex ends 2003 when SV2 established.
Quick-Tip Q & A
A:[[ I've inherited a Fortran program which uses implicit variable typing, [[ and has problems. As the new "maintainer" of this program, I need to [[ clean it up. [[ [[ First, I plan to insert IMPLICIT NONE directives in every file and [[ write explicit declarations for every variable. Is there an easy way [[ to do this, or do I need to go through the code line-by-line? Cray's Fortran compiler has excellent listing options. If you ask, it will generate reports which show all variable names and where they're declared, set, and referenced (even when they're "declared" implicitly). If a variable name has been misspelled, accepted by the compiler as an implicit declaration, and thus not reported as an error, this mistake will still show up in a report (see below). Try: f90 -r4 Adding IMPLICIT NONE will make these mistakes show up as the errors they are. Back to the original question... this option: f90 -rx can simplify the process of rewriting the code. The "-rx" report will tell you which variables are being implicitly typed and their type. You could simply edit the report to generate Fortran code or write a perl script to automate this editing. Of course, this is your chance to clean things up, too. What follows are snippets of output from these two types of Cray reports. The object of the reports was an otherwise correct Fortran source file to which the following line was added: YYY = ZZZ The accepts this as an implicit declaration of two reals, YYY and ZZZ: From: f90 -r4 ================================================================== Cross-reference map: 95 Identifiers (197 References) Type Kind Usage EqDSv Offset Home Name References ------- ----- ----- ------ ------ ------ -------------- Real 8 Scalar - 0 Stack YYY 31= Real 8 Scalar - 0 Stack ZZZ 31 [ ... cut ... ] Identifier characteristics report: 88 Variables (2 with F90 attributes) Name Attributes ------ -------------- YYY Type=Real, Kind=8, Scalar ZZZ Type=Real, Kind=8, Scalar [ ... cut ... ] 61 ftnlint messages 60) <4> Local Variable "YYY" is assigned a value but never used 61) <3> Local Variable "ZZZ" is used but never assigned a value [ ... cut ... ] f90 Compiler - 6 messages: 1) <cf90-7212,Warning,Line=31> Variable "ZZZ" is used before it is defined. From: f90 -rx ================================================================== (the numbers show lines on which given variables were declared, set, or used. ) BFCT INTEGER, PARAMETER Decl 25 Set Used 40 45 46 BLKEND Stack INTEGER Decl 26 Set 46 Used 47 49 55 56 59 66 67 YYY Stack REAL, Implicitly typed Decl Set 31 Used ZZZ Stack REAL, Implicitly typed Decl Set Used 31 IBM's xlf compiler can generate similar, though less friendly, reports. Try these options: xlf90 -qsource -qxref=full SGI's f90 compiler seems to lack similar capabilities. (Send us a note if you know otherwise.) Q: I share lots of big data files with my group, using regular Unix permissions. Most of the files have been DMF migrated off disk and onto tape. Quota is applied to disk files, but not migrated files. DMF makes it really easy for one person to manage his/her files, as the commands are easy, and storage is basically unlimited. The problem I have is that group members can "dmget" my files as needed (which is what I want) but they can't "dmput" them when they're through. At the moment, group members are sending me email when I need to re-migrate a file they've used, but it's inconvenient and I keep hitting my quota unsuspectingly. Any suggestions?
[[ Answers, Questions, and Tips Graciously Accepted ]]
Ed Kornkven ARSC HPC Specialist ph: 907-450-8669 Kate Hedstrom ARSC Oceanographic Specialist ph: 907-450-8678 Arctic Region Supercomputing Center University of Alaska Fairbanks PO Box 756020 Fairbanks AK 99775-6020
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